1. Technical Field
The present invention relates to a method for manufacturing a semiconductor device that provides prevention for thermal shrinkage of a patterned resist in a bake process.
2. Related Art
FIGS. 1A to 1D show cross-sectional views, illustrating a process for forming a typical conventional patterned resist. Here, a case of employing a positive resist is described as an example. In the process for forming a patterned resist, first of all, a resist is applied on a substrate 11 to form a resist layer 12 (FIG. 1A). Next, the resist layer 12 is exposed to light through a reticle 15 having a desired pattern arranged thereon to partially expose the resist layer to light. The exposed region of the resist layer 12 is removed by employing a liquid developer to form a patterned resist 18 (FIG. 1C).
Finally, a bake process is conducted on the patterned resist 18. The bake process exhibits advantageous effects such as prevention for pinhole in resists or polymer resin films such as polyimide film, an improved adhesiveness with substrates, a reduced degassing, an improved dry etch resistance and the like, and thus is generally broadly adopted. In addition, a thermal flow technology, in which a temperature of a resist in a bake process is optimized so as to plasticize a resin so that a pattern having a reduced dimension that is smaller than an estimated dimension of a developed pattern of holes is intentionally formed, is also employed mainly in processes for forming holes.
However, as shown in FIG. 1D, the patterned resist 18 may be often shrunk from an edge of the pattern toward the inside thereof by the bake process to be deformed. The level of the deformation in the patterned resist by such bake process tends to be further increased at higher baking temperature for thicker resist film and larger dimension of the pattern, and non-negligible deformations are increasingly occurred due to miniaturizations of the devices.
A specific example of employing the above-described patterned resist as a mask for ion implantation process will be described. FIGS. 2A to 2C are cross sectional views, illustrating an ideal process that exhibits no geometric change in a patterned resist due to a bake process.
When an ideal resist film is assumed, the patterned resist 18 maintains a rectangular geometry in an edge of the pattern after the bake process (FIG. 2A). An ion implantation is conducted through a mask of such patterned resist 18 (FIG. 2B). As a result, an injection is conducted at a desired injection level over a desired region of a substrate 11 to form an implanted region A28 as shown in FIG. 2C.
Besides, FIGS. 3A to 3C are cross sectional views, illustrating an example of an ion implanting process while a geometry change has been occurred in a patterned resist due to a bake process. As shown in FIG. 3A, a tapered geometry is formed in an edge of the pattern of the resist having larger dimensional area, and thus the resist film is partially thinned in the tapered section. Thus, when an ion implantation process is conducted through a mask of such patterned resist 18 (FIG. 3B), ion is also implanted over the section of the substrate corresponding to the thinned region of the resist film as shown in FIG. 3C. As a result, in addition to the targeted implant region A28, an unwillingly implanted region B29 is also formed, and thus it is expected that this leads to an electric failure in the semiconductor device.
A typical approach to prevent such deformation of the resist due to the bake process is described in Japanese Patent Laid-Open No. H06-53,159 (1994), in which a shrinkage-preventing pattern such as a bumpy or a saw tooth pattern is two-dimensionally formed in a resist and a presence of such bumpy or saw teeth pattern provides a prevention for a deformation in the patterned resist due to the bake process.
However, since the above-described conventional technology involves two-dimensionally forming an irregularity, it is necessary to form a two-dimensional pattern such as two-dimensional concave and convex geometry or saw teeth geometry in the implanted region. This leads to a complicated design, which is difficult to be applied to a fine pattern. In addition, it is also difficult to apply such technology to other processes such as an etching process and the like.
Here, typical deformation after a bake process for a resist employed as a mask for a dry etching process will specifically be described in reference to FIGS. 4A to 4C and FIGS. 5A to 5C.
FIGS. 4A to 4C illustrate a process for forming holes in an insulating film through a resist mask for dry etching. FIG. 4A is a plan view of a patterned resist 18 having openings 20 for forming holes, and FIG. 4B is an cross-sectional view along line A-A′ in FIG. 4A. An insulating film 22 is deposited on a substrate 11 and a resist is applied, and then an exposure and a development processes are conducted on the resist layer to form a patterned resist 18 provided with openings 20. The insulating film 22 is dry etched through a mask of such patterned resist 18, and then the patterned resist 18 is removed to form the holes in the insulating film 22, as shown in FIG. 4A.
On the one hand, FIGS. 5A to 5C show the condition of the formation of openings 20 for forming holes having a reduced size by conducting a high-temperature bake process employing the thermal flow technology described above. FIG. 5A is a plan view of a patterned resist 18 after a high-temperature bake process is conducted, and FIG. 5B is a cross-sectional view along line B-B′ in FIG. 5A. The amount of the resist is smaller in the section adjacent to the openings 20 where a fluidization of the resist is reduced, and thus a deformation of the resist is also smaller. However, other sections thereof are greatly deformed since other sections of the resist are shirred, resulting in forming different two-dimensional geometry and cross-sectional geometry of the opening 20 shown in FIGS. 5A and 5B, which are totally different from that shown in FIGS. 4A to 4C.
FIG. 5C shows a cross-sectional view, showing a status of the device, which is obtained by conducting an etch process through a mask of such patterned resist 18 and then the resist is removed. It can be understood that a center of the hole is shifted to the adjacent section. This means that a dislocation may be caused after the shrinkage when it is assumed that the dimension of hole is designed to be the equivalent to the dimension of the holes in the patterned holes in the resist. This may cause an electric disturbance due to a misalignment in semiconductor devices that are manufactured by stacking multiple layers in multiple processes with an improved accuracy.